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PCI CD/CDa Configurable DMA Interface User’s Guide Registers

EDT, Inc. May 2007 25

PLL Programming Register

Size 8-bit

I/O read-write

Address 0x20

Access EDT_SS_PLL_CTL

Comment PCI CDa only. The program

set_ss_vco uses this register to program the serial

interface of the four PLLs.

Flash ROM Address Register

Size 32-bit

I/O read-write

Address 0x80

Access EDT_FLASHROM_ADDR

Comment Use this register and the Flash ROM Data Register (below) to update the program

the PCI Xilinx.

Flash ROM Data Register

Size 32-bit

I/O read-write

Address 0x84

Access EDT_FLASHROM_DATA

Comment Use this register and the Flash ROM Address Register (above) to update the

program the PCI Xilinx.

Bit Name Description

7 PLL_SCLK Connected to all four PLL serial clock inputs.

6 PLL_DATA Connected to all four PLL serial data inputs.

5–4 not used

3–0 PLL_STROBE Connected to the strobe inputs of PLL 3–0, respectively.

Bit Description

31–25 Reserved for EDT internal use.

24 A value of 1 causes the data in the flash ROM data register to be written to the address specified by

bits 0 through 23. A value of 0 reads the data.

23–0 Address of location in flash ROM that the next read or write will access.

Bit Description

31–9 not used

1 2 ... 24 25 26 27 28 29 30 31 32 33 34 ... 39 40

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CDA CD 60 Betriebsanweisung Seite 29