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PCI CD and PCI CDa

Document Number: 008-00965-06 EDT Public Revision: I December 2004

Template: edt.dot

Page 71

Registers

The PCI CD/CDa has two memory spaces: the memory-mapped registers and the configuration space.

Expansion ROM and I/O space are not implemented.

Applications can access the PCI CD/CDa registers through the DMA library routines edt_reg_read

or edt_reg_write using the name specified under “Access,” or if necessary by means of ioctl calls

with PCI CD/CDa-specific parameters, as defined in the file pcd.h.

Configuration Space

The configuration space is a 64-byte portion of memory required to configure the PCI Local Bus and to

handle errors. Its structure is specified by the PCI Local Bus specification. The structure as

implemented for the PCI CD/CDa is as shown in Figure 6 and described below.

Address Bits

31 16 15 0

0x00 Device ID: PCD.SSD = 26

PCD64 = 26

PCD16 = 27

Vendor ID = 0x123D

0x04 Status (see below) Command (see below)

0x08 Class Code = 0x088000 Revision ID = 0

(will be updated)

0x0C BIST = 0x00 Header Type =

0x00

Latency Timer

(set by OS)

Cache Line Size

(set by OS)

0x10 DMA Base Address Register* (set by OS)

0x14 Remote Xilinx Memory-Mapped IO Base Address Register (set by OS)

not implemented

0x3C Max_Lat = 0x04 Min_Gnt = 0x04 Interrupt Pin =

0x01

Interrupt Line (set

by OS)

Figure 2. Configuration Space Addresses

Values for the status and command fields are shown in Tables 6 and 7. For complete descriptions of the

bits in the status and command fields, see the PCI Local Bus Specification, Revision 2.1, 1995,

available from:

PCI Special Interest Group

5440 SW Westgate Drive Suite 217

Portland, OR 97221

Phone: 800/433-5177 (United States) or 425/803-1191 (international)

Fax: 503/222-6190

www.pcisig.com

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