CDA CD 60 Spezifikationen PDF herunterladen (Seite 83)

PCI CD and PCI CDa

Document Number: 008-00965-06 EDT Public December 2004

Template: edt.dot

Page 83

Command Register

Size 8-bit

I/O read-write

Address 0x00

Access PCD_CMD

Bit EDT_ Description

D0 DIR A value of 1 indicates data is coming in to the PCI CD.

D1 FORCEBNR A value of 1 tells device that board is not ready.

D2 DATA_INV If this bit is set, the PCI CD inverts the data.

D3 ENABLE Set to 1 to enable the PCI CD interface. This bit is set after

the direction is chosen and typically after the first DMA

buffer is ready. To reset direction or flags this bit must be

reset.

To flush the DMA FIFOs, clear then set this bit.

D4-7 STAT_INT_EN A value of 1 enables the corresponding STAT bit to cause

an interrupt when it is asserted.

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CDA CD 60 Spezifikationen Seite 83