
PCI CD and PCI CDa
Document Number: 008-00965-06 EDT Public December 2004
Template: edt.dot
Page 81
Interrupt Registers
PCI Interrupt and Remote Xilinx Configuration Register
Size 32-bit
I/O read-write
Address 0xC4
Access EDT_REMOTE_OFFSET
Comment Remote Xilinx is also referred to as Interface or User Xilinx.
Bit EDT_ Description
D31–22 Not used.
D21 RMT_STATE Remote Xilinx INIT pin state. This bit is read-only.
D20 RMT_DONE Remote Xilinx DONE pin.
D19 RMT_PROG Remote Xilinx PROG pin.
D18 RMT_INIT Remote Xilinx INIT pin.
D17 EN_CCLK Enable one configuration clock cycle to remote Xilinx.
D16 RMT_DATA Remote Xilinx program data.
D15 PCI_EN_INTR Enable PCI interrupt.
D14 RMT_EN_INTR Enable Remote Xilinx interrupt.
D13–9 Not used.
D8 RFIFO_ENB After the remote Xilinx has been programmed to your
satisfaction:
1. Clear, then set bit D3 of the remote Xilinx command
register.
2. Set this bit to enable the burst data FIFO.
D7 Not used.
D6–0 RMT_ADDR 128-byte address of remote Xilinx register.
To program the remote Xilinx:
1. Set the PROG and INIT pins low.
2. Wait for DONE (D20) to be low.
3. Set the PROG and INIT pins high.
4. Loop until INIT state (D21) goes high.
5. Wait four µs.
6. Write programming date, one bit at a time, to D16 with D17 high.
7. After all data is written, continue writing ones to D16 until DONE (D20)
goes high.
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